Package: covered-doc
Source: covered
Version: 0.7.10-6
Architecture: all
Maintainer: Ubuntu Developers <ubuntu-devel-discuss@lists.ubuntu.com>
Original-Maintainer: Debian Electronics Team <pkg-electronics-devel@lists.alioth.debian.org>
Installed-Size: 2437
Section: doc
Priority: optional
Multi-Arch: foreign
Homepage: http://covered.sourceforge.net/
Description: Verilog code coverage analysis tool - documentation
 Covered is a Verilog code coverage utility that reads in a Verilog design and
 a generated VCD/LXT dumpfile from that design and generates a coverage file
 that can be merged with other coverage files or used to create a coverage
 report. Covered also contains the GUI coverage report utility that reads in a
 coverage file to allow interactive coverage discovery. Areas of coverage
 measured by Covered are: line, toggle, memory, combinational logic, FSM
 state/state-transition and assertion coverage.
 .
 This package contains the documentation.
